555 timer IC is an IC that is used as a delay element, pulse generation and oscillation applications.
Figure below shows the internal schematic of timer IC 555.
Internal schematic of timer IC 555
Different terminals of the timer 555 are designated as Ground (Terminal-1), Trigger (Terminal-2), Output (Terminal-3), Reset (Terminal-4), Control (Terminal-5), Threshold (Terminal-6), Discharge (Terminal-7) and +Vcc (Terminal-8). Internally, it comprises two op-amp comparators, a flip-flop, a discharge transistor, three identical resistors and an output stage. The resistors set the reference voltage levels at the non-inverting input of the lower comparator and inverting input of the upper comparator at +VCC/3 and +2VCC/3, respectively. Outputs of two comparators feed SET and RESET input of the flip-flop and thus decide the logic status of its output and subsequently the final output. The flip-flop’s complementary outputs feed the output stage and the base of the discharge transistor. This ensures that when the output is HIGH, the discharge transistor is OFF and when the output is LOW, the discharge transistor is ON. With this background, we will now describe the astable and monostable circuits configured around timer 555.
Figure below shows the basic 555 timer-based astable multivibrator circuit.
Astable multivibrator using timer IC 555
The working of the circuit is explained as follows. • Initially, capacitor C is fully discharged, which forces output to go to the HIGH-state. An open discharge transistor allows capacitor C to charge from +VCC through R1 and R2. • When the voltage across C exceeds +2VCC/3, the output goes to the LOW-state and the discharge transistor is switched ON at the same time. • Capacitor C begins to discharge through R2 and the discharge transistor inside the IC. When the voltage across C falls below +VCC/3, the output goes back to the HIGH-state. • The charge and discharge cycles repeat and the circuit behaves like an astable multivibrator. • HIGH-state and LOW-state time periods are governed by the charge (+VCC/3 to +2VCC/3) and discharge (+2VCC/3 to +VCC/3) timings.
The relevant waveforms are shown in figure below.
Timing waveforms of the astable multivibrator configured around timer IC 555Timing waveforms of the astable multivibrator configured around timer IC 555
Figure below shows the basic monostable multivibrator circuit configured around timer 555.
Monostable multivibrator circuit configured around timer IC 555
• Terminal-2 of the IC is initially kept at +VCC. A HIGH at Terminal-2 forces the output to LOW-state. • A HIGH-to-LOW trigger pulse (LOW-level of the trigger pulse needs to go at least below +VCC/3) is applied at Terminal-2. It holds the output in the HIGH-state and simultaneously allows the capacitor to charge from +VCC through R. • When the capacitor voltage exceeds +2VCC/3, the output goes back to the LOW-state. • We need to apply another trigger pulse to Terminal-2 to make the output go to the HIGH-state again. • Every time the timer is appropriately triggered, the output goes to the HIGH-state and stays there for a time period taken by capacitor to charge from 0 to +2VCC/3. Figure below shows the relevant timing diagrams.
Waveforms for monostable multivibrator circuit configured around timer IC 555
The pulse width of the trigger input should be less than the HIGH-time of the monoshot output.
An external circuit is connected between the trigger input waveform and the terminal-2 of timer 555 so that terminal-2 of the IC gets the required trigger pulse corresponding to the desired edge of the trigger waveform. It also ensures that the input trigger pulse width is smaller than the output pulse width.
Figure below shows the monoshot configuration that can be triggered on the trailing edges of the trigger waveform. As we can see from the figure, R1–C1 constitutes a differentiator circuit. One of the terminals of resistor R1 is tied to +VCC. Therefore, the amplitudes of differentiated pulses are +VCC to +2VCC and +VCC to ground, corresponding to leading and trailing edges of the trigger waveform, respectively. Diode D clamps the positive-going differentiated pulses to about +0.7 V. Hence, the trigger terminal of timer 555 gets the required trigger pulses corresponding to HIGH-to-LOW edges of the trigger waveform.
Timer 555 monoshot configuration triggered on the trailing edges
Figure below shows the relevant waveforms.
Relevant waveforms
For the differentiator to work prooperly, values of R1 and C1 for the differentiator should be chosen carefully. First, differentiator time constant should be much smaller than the HIGH-time of the trigger waveform for proper differentiation. Second, differentiated pulse width should be less than the expected HIGH-time of the monoshot output.
Terminal-4 of the IC is the RESET terminal. Usually, it is connected to +VCC. If the voltage at this terminal is driven below 0.4 V, the output is forced to the LOW-state overriding command pulses at Terminal-2 of the IC.